The invention relates to a semiconductor device manufacturing method and, more particularly, to an oxide pattern forming method and a patterning method of a semiconductor device using the same.
A hard mask is generally used to form various components, such as a device isolation layer, a landing plug poly contact, a gate, a bit line, or a storage node, for example, by patterning during a semiconductor device manufacturing process.
Basically, it is necessary for the hard mask to be formed of a material layer satisfying the following several requirements.
First, it is necessary for the hard mask to be formed of a material layer which has a high etching selectivity, which can be easily patterned, and which has high deposition uniformity. In addition, it is necessary that by-products not be produced when the material layer used to form the hard mask is deposited on a patterning target layer. According to circumstances, it is necessary that the material layer have a low dielectric constant.
The hard mask satisfying the above-specified requirements is generally formed using a silicon nitride, polysilicon, a tungsten nitride, tungsten, or a silicon oxy-nitride depending upon the kinds of lower patterning target layers and the kinds of patterns formed through the patterning of the lower patterning target layers.
However, the silicon nitride, the polysilicon, the tungsten nitride, the tungsten, or the silicon oxy-nitride is not a material layer commonly used during semiconductor device manufacturing processes. For this reason, it is necessary to provide an additional apparatus for forming and patterning the hard mask at the respective patterning processes for forming various components of a semiconductor device and to set the additional apparatus in order to form the hard mask using the above-specified material layer. As a result, the semiconductor device manufacturing process is complicated, and therefore economic efficiency decreases.
In addition, it is necessary for the hard mask formed of the above-specified material layer to protect the lower patterning target layer during the patterning process using the hard mask. To this end, the hard mask generally exhibits a low etching rate. For this reason, particles resulting from the hard mask may be left over or by-products may be produced by the reaction between the hard mask and the patterning target layer during the removal of the hard mask after patterning the patterning target layer. Consequently, the defective proportion of semiconductor devices increases, and therefore the yield rate and characteristics of the semiconductor devices are deteriorated.